Course Title and Code
Digital Systems (EE2070)
Programme
UG Core
Course Credit
3-0-2-4 (Lecture-Tutorial-Practical-Total Credits)
Course Category
Core
Target Discipline
EE
Prerequisite
Nil
Course Content
| S/N | Topic | Lecture (hours) | Practical (hours) |
|---|---|---|---|
| 1 | Introduction to Digital systems and Boolean Algebra: Binary, octal and hexadecimal number systems; Basic logic operation and logic gates; truth table; basic postulates and fundamental theorems of Boolean Algebra; Canonical (SOP and POS) forms; Logic minimization and implementation: Minterm and Maxterms; Karnaugh maps; incompletely specified functions; NAND and NOR implementations; Switch level representation using transistors using CMOS | 9 | 0 |
| 2 | Combinational Logic: Decoder, encoders, multiplexers, demultiplexers and their applications; Arithmetic circuits; Representation of signed numbers; Adders -- ripple carry, carry look ahead, BCD adders | 11 | 6 |
| 3 | Sequential Logic: Latches and flip flops D latch, D flip-flop, Setup and hold parameters; Timing analysis; Registers and counters; Shift register; Synchronous counter design using D and JK flip-flops, State Machine Design: Definition of state machines; State machine as a sequential controller; Moore and Mealy state machines; Derivation of state graph and tables; Sequence detector; Design state machine using ASM charts; | 12 | 3 |
| 4 | Memory and Programmable Logic Devices: Read Only Memories FPGAs; Hardware description language: Modeling combinational and sequential circuits using Verilog. | 10 | 12 |
| Total | 42 | 21 | |
Learning Outcomes
- Understand digital system abstractions such as digital representations of information, digital logic, Boolean algebra, state elements, and finite state machine.
- Design, build and test digital logic for systems of moderate complexity using common digital components, schematic diagrams, and hardware description language.
List of Experiments
- Basic AND, OR and Inverter gates and a parity generator on a bread board.
- Half adder and full adder circuits on a bread board.
- 4-bit binary counter design using flip flops on a bread board.
- 4-bit adder design using Verilog hierarchical design, test bench, simulation and FPGA implementation.
- Traffic light controller design using Verilog hierarchical design, test bench, simulation and FPGA implementation.
- Accumulator circuit design in Verilog hierarchical design, test bench, simulation and FPGA implementation.
- Fibonacci series generation on an FPGA using two adders and a register.
Text Books
- Digital Design With an Introduction to the Verilog HDL, VHDL, and SystemVerilog, Pearson Education; Sixth edition, 2018 ISBN 978-9353062019